Electronic Engineering McqsVLSI Design 100+ MCQ & Answer VLSI Design | page-04 | Electronic Engineering MCQ And Answer January 28, 2025 DSN MARATHI 31. _______ is used to deal with effect of variation A. chip level technique B. logic level technique C. switch level technique D. system level technique Answer Option : D 32. As die size shrinks, the complexity of making the photomasks A. increases B. decreases C. remains the same D. cannot be determined Answer Option : A 33. _______ architecture is used to design VLSI A. system on a device B. single open circuit C. system on a chip D. system on a circuit Answer Option : C 34. ____ is used in logic design of VLSI A. LIFO B. FIFO C. FILO D. LILO Answer Option : B 35. Which provides higher integration density? A. switch transistor logic B. transistor buffer logic C. transistor transistor logic D. circuit level logic Answer Option : C 36. Physical and electrical specification is given in A. architectural design B. logic design C. system design D. functional design Answer Option : D 37. Which is the high level representation of VLSI design A. problem statement B. logic design C. HDL program D. functional design Answer Option : A 38. nMOS fabrication process is carried out in A. thin wafer of a single crystal B. thin wafer of multiple crystals C. thick wafer of a single crystal D. thick wafer of multiple crystals Answer Option : A 39. ______ impurities are added to the wafer of the crystal A. n impurities B. p impurities C. siicon D. crystal Answer Option : B 40. The photoresist layer is exposed to A. visible light B. ultraviolet light C. infra red light D. LED Answer Option : B
31. _______ is used to deal with effect of variation A. chip level technique B. logic level technique C. switch level technique D. system level technique Answer Option : D
32. As die size shrinks, the complexity of making the photomasks A. increases B. decreases C. remains the same D. cannot be determined Answer Option : A
33. _______ architecture is used to design VLSI A. system on a device B. single open circuit C. system on a chip D. system on a circuit Answer Option : C
35. Which provides higher integration density? A. switch transistor logic B. transistor buffer logic C. transistor transistor logic D. circuit level logic Answer Option : C
36. Physical and electrical specification is given in A. architectural design B. logic design C. system design D. functional design Answer Option : D
37. Which is the high level representation of VLSI design A. problem statement B. logic design C. HDL program D. functional design Answer Option : A
38. nMOS fabrication process is carried out in A. thin wafer of a single crystal B. thin wafer of multiple crystals C. thick wafer of a single crystal D. thick wafer of multiple crystals Answer Option : A
39. ______ impurities are added to the wafer of the crystal A. n impurities B. p impurities C. siicon D. crystal Answer Option : B
40. The photoresist layer is exposed to A. visible light B. ultraviolet light C. infra red light D. LED Answer Option : B
